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opment, increasing capabilities/capacity/speed/low power

of FPGAs, shrinking development schedules, and the need

to cut costs. “Many projects are converting from ASIC to

FPGA. Users are now expecting tool robustness as with

ASIC tools. Some applications that could only use ASIC can

now be implemented in FPGA,” he said.

There are new FPGA vendors with niche capabilities such as

more than 1GHZ clock and very low power as well as some

FPGA-like designs with ASIC-like costs, Platzker pointed

out. “What’s happening here is that some existing vendors

and some new vendors are making it possible to use FPGAs,

developed with FPGA design tools and with FPGA flex-

ibility, as a starting point, and then once the customer has

got the design set, the FPGA vendor will deliver an ASIC-

like chip. This gives the best of both worlds - the flexibility

of an FPGA with ASIC-like pricing.”

Another driver for the increasing interest and use of

FPGAs in place of ASICs or ASSPs is the fact that FPGAs

have become much easier to develop as new, higher-level

language-based development flows, leveraging C or Matlab

for example, enable developers to approach FPGA develop-

ment from a more familiar, abstract perspective, Ratford

asserted. “Tools such as The MathWorks’ Simulink have the

potential to provide a graphical-based object-oriented envi-

ronment for FPGA development as well as the development

of hybrid FPGA/processor-based systems. Tools are also

being introduced that simplify the integration of multipro-

cessor systems,” he added.

Speciﬁc examples of new applications driving FPGAs in

diﬀerent markets are in automotive infotainment where

designers are merging in-car access to rich media content

typically found in the home with real-time access to road,

traﬃc, and GPS information. Lane departure warning sys-

tems and driver fatigue sensing systems are other examples.

Outside of the automotive space, applications such as video

surveillance and integrated analytics leverage FPGAs, along

with wired and wireless communications, defense, medical

and test and measurement applications – all use today’s

FPGAs to address emerging and changing standards, while at

the same time delivering the power, performance and feature

requirements that only ASICs did in the past, Ratford said.

Henderson agrees that surveillance and military applica-

tions are driving trends in the FPGA industry, and has seen

a surprising number of medical or mobile instrumentation

applications.

Engineering Challenges

With the increasing use of FPGAs in a wide range of applica-

tion, customer demands include tools and methodology for

vendor-independent designs; making verification easier;

complete flow integration including PCB-FPGA co-design;

meeting QoR (mainly timing closure); IP integration;

embedded software development; synthesis/PAR run time;

and less design iterations, according to Platzker.

Henderson noted that since the current crop of high-

density FPGAs are power-hungry and run hot, customers

request these devices be coupled with state-of-the-art

analog I/O resulting in designs with very high power-den-

sities. “Fortunately, the newly-announced Virtex6 devices

will mitigate this issue,” he said.

Finally, in terms of engineering challenges that customers

are asking to be addressed, Ratford pointed to the previ-

ously mentioned FMC standard, which he said is a great

example. “Because FPGA I/O interfaces are tightly coupled

to the device’s underlying architecture, circuit boards have

to be designed speciﬁcally to handle a particular type of I/O,

limiting the amount of reuse aﬀorded to board designers. e

new VITA 57 standard, also known as the FPGA Mezzanine

Card (FMC), addresses this and other related I/O issues by

deﬁning an I/O mezzanine module that works intimately

with an FPGA so that systems can be built modularly.”

“As today’s systems continue to drive more bit bandwidth,

it’s important to customers that we enable efficient com-

munications between chips on a board, between the cards

and equipment that make up a system, and of course on the

chip itself. Serial I/O adoption continues to increase, which

is why Xilinx has included resources such as hardened PC

Express blocks on their chips,” he continued.

“Likewise, customers are asking for more serial I/O and

memory interface bandwidth on our chips because new appli-

cations require ever more memory interface bandwidth. We

also need to keep up with cutting edge interface technology

such as Interlaken, 100G+ Ethernet, streaming HD video,

and so fourth…Power management is obviously critical.

The FPGA industry continues to make improvements in

the power consumption of our devices as customers require

higher performance in smaller and smaller form-factors,

and at the same time want to simplify heat sink and airflow.

They also want to fewer and lower cost power supplies and

ma ny want to be Energ y Star compl ia nce. T hese are al l issues

you’ll be seeing the FPGA industry continuing to address in

coming generations of products,” Ratford concluded.

Ann Steﬀora Mutschler is Editor of Extension

Media’s EECatalog Resource Catalogs, and is also

a Contributing Editor to Chip Design Magazine’s

System-Level Design and Low-Power Design Com-

munities. Her previous experience includes a long

stint as a Senior Editor at Reed Business Informa-

tion for publications including EDN, Electronic

News and Electronic Business. She has moderated a number of pan-

els in Silicon Valley and has written for publications worldwide.

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